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bcm2837.h
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1 
11 #ifndef _BCM2837_H_
12 #define _BCM2837_H_
13 
14 #include <stddef.h>
15 
16 /********************************************************************
17  * ARM physical memory addresses of selected BCM2837 peripherals *
18  ********************************************************************/
19 
20 /* Start of memory-mapped peripherals address space */
21 #define PERIPHERALS_BASE 0x3F000000
22 
23 /* System timer */
24 #define SYSTEM_TIMER_REGS_BASE (PERIPHERALS_BASE + 0x3000)
25 
26 /* Interrupt controller (for ARM) */
27 #define INTERRUPT_REGS_BASE (PERIPHERALS_BASE + 0xB200)
28 
29 /* Mailbox */
30 #define MAILBOX_REGS_BASE (PERIPHERALS_BASE + 0xB880)
31 
32 /* Power management / watchdog timer */
33 #define PM_REGS_BASE (PERIPHERALS_BASE + 0x100000)
34 
35 /* PL011 UART */
36 #define PL011_REGS_BASE (PERIPHERALS_BASE + 0x201000)
37 
38 /* GPIO */
39 #define GPIO_REGS_BASE (PERIPHERALS_BASE + 0x200000)
40 
41 /* SD host controller */
42 #define SDHCI_REGS_BASE (PERIPHERALS_BASE + 0x300000)
43 
44 /* Synopsys DesignWare Hi-Speed USB 2.0 On-The-Go Controller */
45 #define DWC_REGS_BASE (PERIPHERALS_BASE + 0x980000)
46 
47 
48 /***************************************************************************
49  * IRQ lines of selected BCM2837 peripherals. Note about the numbering *
50  * used here: IRQs 0-63 are those shared between the GPU and CPU, whereas *
51  * IRQs 64+ are CPU-specific. *
52  ***************************************************************************/
53 
54 /* System timer - one IRQ line per output compare register. */
55 #define IRQ_SYSTEM_TIMER_0 0
56 #define IRQ_SYSTEM_TIMER_1 1
57 #define IRQ_SYSTEM_TIMER_2 2
58 #define IRQ_SYSTEM_TIMER_3 3
59 
60 /* Timer IRQ to use by default. Note: this only be either 1 or 3, since 0 and 2
61  * are already used by the VideoCore. */
62 #define IRQ_TIMER IRQ_SYSTEM_TIMER_3
63 
64 /* Synopsys DesignWare Hi-Speed USB 2.0 On-The-Go Controller */
65 #define IRQ_USB 9
66 
67 /* PCM sound */
68 #define IRQ_PCM 55
69 
70 /* PL011 UART */
71 #define IRQ_PL011 57
72 
73 /* SD card host controller */
74 #define IRQ_SD 62
75 
76 
77 /************************************
78  * Board-specific power management *
79  ************************************/
80 
81 enum board_power_feature {
82  POWER_SD = 0,
83  POWER_UART_0 = 1,
84  POWER_UART_1 = 2,
85  POWER_USB = 3,
86 };
87 
88 extern int bcm2837_setpower(enum board_power_feature feature, bool on);
89 extern void bcm2837_power_init(void);
90 
91 #define board_setpower bcm2837_setpower
92 
93 
94 /************************************************************************
95  * Interfaces to memory barriers for peripheral access. *
96  * *
97  * These are necessary due to the memory ordering caveats documented in *
98  * section 1.3 of Broadcom's "BCM2837 ARM Peripherals" document. *
99  ************************************************************************/
100 
101 extern void dmb(void);
102 
103 /* Memory barriers needed before/after one or more reads from a peripheral */
104 #define pre_peripheral_read_mb dmb
105 #define post_peripheral_read_mb dmb
106 
107 /* Memory barriers needed before/after one or more writes to a peripheral */
108 #define pre_peripheral_write_mb dmb
109 #define post_peripheral_write_mb dmb
110 
111 /* Memory barriers needed before/after one or more reads and writes from/to a
112  * peripheral */
113 #define pre_peripheral_access_mb dmb
114 #define post_peripheral_access_mb dmb
115 
116 #endif /* _BCM2837_H_ */
int bcm2837_setpower(enum board_power_feature feature, bool on)
Definition: bcm2837_power.c:90
void bcm2837_power_init(void)
Definition: bcm2837_power.c:116