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Data Fields
dwc_regs::dwc_host_channel::dwc_host_channel_interrupts Union Reference

#include <usb_dwc_regs.h>

Data Fields

uint32_t val
 
struct {
   uint32_t   transfer_completed: 1
 
   uint32_t   channel_halted: 1
 
   uint32_t   ahb_error: 1
 
   uint32_t   stall_response_received: 1
 
   uint32_t   nak_response_received: 1
 
   uint32_t   ack_response_received: 1
 
   uint32_t   nyet_response_received: 1
 
   uint32_t   transaction_error: 1
 
   uint32_t   babble_error: 1
 
   uint32_t   frame_overrun: 1
 
   uint32_t   data_toggle_error: 1
 
   uint32_t   buffer_not_available: 1
 
   uint32_t   excess_transaction_error: 1
 
   uint32_t   frame_list_rollover: 1
 
   uint32_t   reserved: 18
 
}; 
 

Detailed Description

Channel Interrupts Register -

Bitmask of status conditions that have occurred on this channel.

These bits can be used with or without "real" interrupts. To have the CPU get a real interrupt when one of these bits gets set, set the appropriate bit in the interrupt_mask, and also ensure that interrupts from the channel are enabled in the host_channels_interrupt_mask register, channel interrupts overall are enabled in the core_interrupt_mask register, and interrupts from the DWC hardware overall are enabled in the ahb_configuration register and by any system-specific interrupt controller.

Field Documentation

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::ack_response_received

The device issued an ACK handshake packet (receiving device acknowledged error-free packet).

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::ahb_error

An error occurred on the ARM Advanced High-Performance Bus (AHB).

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::babble_error

Unexpected bus activity occurred.

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::channel_halted

The channel has halted. After this bit has been set, the channel sits idle and nothing else will happen until software takes action.

Channels may halt for several reasons. From our experience these cover all possible situations in which software needs to take action, so this is the only channel interrupt that actually needs to be enabled. At least in DMA mode, the controller to some extent will act autonomously to complete transfers and only issue this interrupt when software needs to take action.

Situations in which a channel will halt include but probably are not limited to:

  • The transfer has completed, thereby setting the transfer_completed flag as documented above.
  • A Start Split or Complete Split transaction has finished.
  • The hub sent a NYET packet when trying to execute a Complete Split transaction, thereby signalling that the Split transaction is not yet complete.
  • The device sent a NAK packet, thereby signalling it had no data to send at the time, when trying to execute an IN interrupt transfer.
  • One of several errors has occurred, such as an AHB error, data toggle error, tranasction error, stall condition, or frame overrun error.
uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::data_toggle_error

When issuing a series of DATA transactions to an endpoint, the correct DATA0 or DATA1 packet ID was not specified in the packet_id member of the transfer register.

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::frame_overrun

TODO

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::nak_response_received

The device issued a NAK handshake packet (receiving device cannot accept data or transmitting device cannot send data).

The channel will halt with this bit set when performing an IN transfer from an interrupt endpoint that has no data to send. As this requires software intervention to restart the channel, this means that polling of interrupt endpoints (e.g. on hubs and HID devices) must be done in software, even if the actual transactions themselves are interrupt-driven.

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::nyet_response_received

The device issued a NYET handshake packet.

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::stall_response_received

The device issued a STALL handshake packet (endpoint is halted or control pipe request is not supported).

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::transaction_error

From our experience this seems to usually indicate that software programmed the channel incorrectly.

uint32_t dwc_regs::dwc_host_channel::dwc_host_channel_interrupts::transfer_completed

The requested USB transfer has successfully completed.

Exceptions and caveats:

  • When doing split transactions, this bit will be set after a Complete Split transaction has finished, even though the overall transfer may not actually be complete.
  • The transfer will only be complete up to the extent that data was programmed into the channel. For example, control transfers have 3 phases, each of which must be programmed into the channel separately. This flag will be set after each of these phases has successfully completed.
  • An OUT transfer is otherwise considered complete when exactly the requested number of bytes of data have been successfully transferred, while an IN transfer is otherwise considered complete when exactly the requested number of bytes of data have been successfully transferred or a shorter-than-expected packet was received.
The documentation for this union was generated from the following file:
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